Phase locked loops (PLL) are employed for many applications in electronics. One of the most common application is to provide a timing signal which is synchronized with another signal. PLL also are widely used in data separators for bit recovery. Generally, a phase locked loop consists of a variable frequency oscillator, called a VCO, in which the VCO output is compared to the signal to which it is being synchronized and the error in phase and frequency is fed to a low pass filter. The output of the low pass filter drives the VCO to servo it to minimize the error. So called two speed servo control is known in PLL to provide a coarse and fine control which enables high speed feedback closure on the minimum error, i.e., the lock state. U.S. Pat. Nos. 5,015,970 and 4,847,876 disclose such a system employing a digital coarse control and an analogue fine control.
Two speed PLL systems employing a high speed digital coarse control and a slower analogue system for fine control usually provide that the digital coarse control range is smaller than the range of the analogue control. This is to assure that the fine control can correct across the entire range of the coarse control. Occasionally, this system can lose control when the analogue control is in its limit in one direction and the digital coarse control signal is not large enough to override the analogue control.